Author Archives: Christof Teuscher

New Asynchronous RBN paper accepted

Our latest paper “On the Sparse Percolation of Damage in Finite Non-Synchronous Random Boolean Networks” (M. Ishii, C. Teuscher, J. Gores) was accepted by Physica D. It is authored by a tlab undergrad and a high school student. Way to go!

Pre-print: https://doi.org/10.1016/j.physd.2019.05.011

The paper presents an inventory of non-synchronous updating schemes and their effect on the sparse percolation (SP) of damage in finite random Boolean networks (RBNs). The results contribute to better understanding the robustness and information processing capabilities of complex systems with more biologically-plausible updating schemes.

Toward Autonomous In-Vivo Learning Machines

Christof Teuscher gave an invited presentation at the Molecular and Quantum Computing Symposium at Brown University, Mar 8-9, 2019. Presentation title: “Toward Autonomous In-Vivo Learning Machines.”

Fast and Accurate Sparse Coding of Visual Stimuli With a Simple, Ultralow-Energy Spiking Architecture

Walt Woods, Ph. D. candidate, and Christof Teuscher, Electrical and Computer Engineering Faculty, co-authored “Fast and Accurate Sparse Coding of Visual Stimuli with a Simple, Ultra-Low-Energy Spiking Architecture,” published in IEEE Transactions on Neural Networks and Learning Systems.

The V1 visual layer of mammalian brains has been identified as performing Sparse Coding (SC) to help the rest of the brain process imagery received from the eyes.  Sparse coding is the compression of input stimulus in such a way that retains key details while saving energy by not transmitting irrelevant details.  In this work, Woods et al. proposed a new architecture named the Simple Spiking Locally Competitive Algorithm (SSLCA).  The proposed SSLCA uses spiking signals, inspired by the spiking signals used in biological brains, to take visual information and re-encode that information in a sparse format for easier processing.  The architecture was enabled through the use of memristors, next-generation nanodevices with dynamic resistances. Using these devices to weight and transmit information between the image input and the resulting sparse code, the SSLCA consumes only 1% of the energy and processes images at a rate 21 times higher than previously proposed sparse coding architectures.  Even though memristors are noisy devices that do not produce clean signals, the architecture was shown to be resistant to write variances of up to 27% and read variances of up to 40%. Woods et al. also researched the combination of such a sparse coding device with a state-of-the-art deep neural network for image processing, showing that, like the V1 cortex, the SSLCA can compress visual information efficiently while retaining necessary details for good classification performance.  Sparse coding architectures such as the proposed SSLCA could be used to greatly reduce communication bandwidth between visual sensors and other processing algorithms, such as deep learning networks.
Full paper: https://doi.org/10.1109/TNNLS.2018.2878002

What is Thermodynamic Computation?

Listen to the Computing Community Consortium (CCC) podcast at: https://www.cccblog.org/2019/02/25/catalyzing-computing-episode-3-what-is-thermodynamic-computing