The Artist-in-the-Lab (AiL) program aims at fostering the collaboration between art, science, and technology. Artists will be embedded in the teuscher.:Lab lab at Portland State University where they can engage and interact with scientists and students to gain a deeper understanding of cutting-edge science and technology. More info at https://www.teuscher-lab.com/ail
Dr. Teuscher gave a plenary presentation entitled “Alternative ways of computing What computes, what doesn’t?” at the 9th Annual IEEE International Conference on Rebooting Computing (ICRC), San Diego, CA, Dec 16-17, 2024.
tlab PhD student Byron Gregg presented both a paper and a poster on “Against the Current: Introducing Reversibility to Superscalar Processors via Reversible Branch Predictors” at “The 15th International Green and Sustainable Computing Conference,” Austin, TX, 2024.
IGSCC proceedings: https://www.computer.org/csdl/proceedings/igsc/2024/22gEnJUWwMg
Citation:
B. Gregg and C. Teuscher, “Against the Current: Introducing Reversibility to Superscalar Processors via Reversible Branch Predictors,” 2024 IEEE 15th International Green and Sustainable Computing Conference (IGSC), Austin, TX, USA, 2024, pp. 135-141, doi: 10.1109/IGSC64514.2024.00033.
Abstract:
Although highly energy efficient, adiabatic and reversible systems suffer from performance drawbacks inherent to the physical operations that make them so efficient. Superscalar processors provide high performance through out-of-order speculative work of which an effective branch predictor is a key component in those performance gains. In the context of reversibility, a branch predictor is a design focal point because any fully reversible system must also be able to predict branch outcomes when in reverse mode. Taking advantage of Temporal Streaming techniques, this paper introduces several reversible branch predictor implementations which enable reversible and out-of-order instruction execution. These first-of-their-kind designs allow for a superscalar architecture that would maintain both a high level of performance and a high level of energy efficiency with the ability to un-compute obsolete data stored in memory. Testing our designs using the SimpleScalar out-of-order simulator, we estimate possible additional savings of 24 fJ per MB of data recovered at room temperature and at reverse prediction rates 2.27% higher than the forward. This work opens new avenues for designing and developing what we are calling Fully Adiabatic, Reversible, and Superscalar (FARS) Processor Architectures and is the first of many adaptations of conventional superscalar components to a reversible system.
Students of the NSF Research Experience for Undergraduates (REU) on “Computational Modeling Serving Portland,” the altREU program to “Design, Program, and Use Computers to Benefit Society,” and teuscher.:Lab interns edited and published a 300-page book on their summer research projects. The book publishing project was entirely led by the interns. The book can be ordered on Amazon (all benefits go to a good cause) at https://www.amazon.com/dp/B0DJ5C1VMN or downloaded for free on PDXScholar at https://archives.pdx.edu/ds/psu/42556.